( en | de | ru )

 

Disambiguation of "Yamashita, Hiroki"

Author of the publication

copydeleteadd this publication to your clipboard
Quantum-Classical Computational Molecular Design of Deuterated High-Efficiency OLED Emitters

, , , , , , , and . (2021)cite arxiv:2110.14836Comment: 13 pages, 10 figures.

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Hiroki Takahashi

Hiroki Kawamura

Hiroki Sumizawa

Kiyonobu Yamashita

Miki Yamashita

 

Other publications of authors with the same name

A 25-to-28 Gb/s High-Sensitivity (-9.7 dBm) 65 nm CMOS Optical Receiver for Board-to-Board Interconnects., , , , , and . IEEE J. Solid State Circuits, 49 (10): 2259-2276 (2014)A 1.2Gb/s write driver with pre-emphasis overshoot control optimized for high density HDD applications., , , , , and . CICC, page 519-522. IEEE, (2005)A 50-Gb/s NRZ-modulated optical transmitter based on a DFB-LD and a 0.18-µm SiGe BiCMOS LD driver., , , , , , , , , and 2 other author(s). OFC, page 1-3. IEEE, (2015)Enhancing low-light color images using an RGB-NIR single sensor., , and . VCIP, page 1-4. IEEE, (2015)10: 4 MUX and 4: 10 DEMUX gearbox LSI for 100-gigabit Ethernet link., , , , , , , , , and 5 other author(s). ISSCC, page 148-150. IEEE, (2011)An 8Gb/s Transceiver with 3×-Oversampling 2-Threshold Eye-Tracking CDR Circuit for -36.8dB-loss Backplane., , , , , , , , , and 1 other author(s). ISSCC, page 98-99. IEEE, (2008)A 50-Gb/s Optical Transmitter Based on a 25-Gb/s-Class DFB-LD and a 0.18-µm SiGe BiCMOS LD Driver., , , , , , and . IEICE Trans. Electron., 99-C (9): 1039-1047 (2016)High-frequency circuit design for 25 Gb/s×4 optical transceiver., , , and . ASP-DAC, page 648-651. IEEE, (2013)Compact and power-efficient 100-Gbps CMOS-based transceiver., , , , , , , , , and 6 other author(s). OFC/NFOEC, page 1-3. IEEE, (2013)A 4× 25-to-28Gb/s 4.9mW/Gb/s -9.7dBm high-sensitivity optical receiver based on 65nm CMOS for board-to-board interconnects., , , , , and . ISSCC, page 118-119. IEEE, (2013)