( en | de | ru )

 

Disambiguation of "Reddy, Sudhakar M."

Author of the publication

copydeleteadd this publication to your clipboard
Embedded Totally Self-Checking Checkers: A Practical Design.

, and . IEEE Des. Test Comput., 7 (4): 5-12 (1990)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Sudhakar Peddireddi

Padhmanand Sudhakar

Edamakanti Chandrakanth Reddy

Malgi Prasad Reddy

Martin Reddy

 

Other publications of authors with the same name

Design of Easily Testable Microprocessors : A Case Study., and . ITC, page 480-483. IEEE Computer Society, (1982)On the Design of Random Pattern Testable PLAs., and . ITC, page 688-695. IEEE Computer Society, (1986)At-speed scan test with low switching activity., , , and . VTS, page 177-182. IEEE Computer Society, (2010)On multiple bridging faults., and . VTS, page 221-226. IEEE Computer Society, (2010)Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Input Sequences Using Single and Multiple Fault Detection Times., and . IEEE Trans. Computers, 51 (4): 409-419 (2002)Testable Realizations for FET Stuck-Open Faults CMOS Combinational Logic Circuits., and . IEEE Trans. Computers, 35 (8): 742-754 (1986)Easily Testable Cellular Realizations for the (Exactly P)-out-of n and (p or More)-out-of n Logic Functions., and . IEEE Trans. Computers, 23 (1): 98-100 (1974)A Multicode Single Transition-Time State Assignment for Asynchronous Sequential Machines., and . IEEE Trans. Computers, 27 (10): 927-934 (1978)On Maximizing the Fault Coverage for a Given Test Length Limit in a Synchronous Sequential Circuit., and . IEEE Trans. Computers, 53 (9): 1121-1133 (2004)On Improving Fault Diagnosis for Synchronous Sequential Circuits., and . DAC, page 504-509. ACM Press, (1994)