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A VVC Fractional Interpolation Hardware Using Memory Based Constant Multiplication.

, and . ICCE, page 1-5. IEEE, (2021)

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An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion., , , and . DSD, page 309-315. IEEE Computer Society, (2011)Dynamic Power Estimation for Motion Estimation Hardware., and . DSD, page 279-282. IEEE Computer Society, (2011)A Computation and Power Reduction Technique for H.264 Intra Prediction., , and . DSD, page 753-760. IEEE Computer Society, (2010)A high performance and low cost hardware architecture for H.264 transform and quantization algorithms., and . EUSIPCO, page 1-4. IEEE, (2005)A novel computational complexity and power reduction technique for H.264 intra prediction., , and . IEEE Trans. Consumer Electronics, 54 (4): 2006-2014 (2008)Dynamically variable step search motion estimation algorithm and a dynamically reconfigurable hardware for its implementation., , , and . IEEE Trans. Consumer Electronics, 55 (3): 1645-1653 (2009)A reconfigurable hardware for one bit transform based multiple reference frame Motion Estimation., , and . DATE, page 393-398. IEEE Computer Society, (2010)A high performance deblocking filter hardware for High Efficiency Video Coding., , and . FPL, page 1-4. IEEE, (2013)A Novel Approximate Constant Multiplier and HEVC Discrete Cosine Transform Case Study., , and . ICCE-Berlin, page 1-6. IEEE, (2020)Low complexity HEVC sub-pixel motion estimation technique and its hardware implementation., , and . ICCE-Berlin, page 159-162. IEEE, (2016)