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Disambiguation of "Fayomi, Christian Jesús B."

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Novel Approach to Low-Voltage Low-Power Bandgap Reference Voltage in Standard CMOS Process.

, and . ICECS, page 208-211. IEEE, (2006)

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Pedro Miguel d' Jesús Montilva

Jesús Araiza

Jesús Arambarri

Jesús Odriozola

Jesús Valle

 

Other publications of authors with the same name

Novel Approach to Low-Voltage Low-Power Bandgap Reference Voltage in Standard CMOS Process., and . ICECS, page 208-211. IEEE, (2006)A DTMOS-based 1 V opamp., , and . ICECS, page 252-255. IEEE, (2003)Low power/low voltage high speed CMOS differential track and latch comparator with rail-to-rail input., , and . ISCAS, page 653-656. IEEE, (2000)A High Efficiency and Fast Response PLL Based Buck Converter: Implementation and Simulation., , , , , and . LASCAS, page 1-4. IEEE, (2020)A 1-V, 10-bit rail-to-rail successive approximation analog-to-digital converter in standard 0.18 um CMOS technology., , and . ISCAS (1), page 460-463. IEEE, (2001)Design methodology using inversion coefficient for low-voltage low-power CMOS voltage reference., , and . SBCCI, page 43-48. ACM, (2010)An experimental 0.6-V 57.5-fJ/conversion-step 250-kS/s 8-bit rail-to-rail successive approximation ADC in 0.18µm CMOS., , , and . ICECS, page 195-198. IEEE, (2009)Low-voltage, high-speed CMOS analog latched voltage comparator using the "flipped voltage follower" as input stage., , , and . Microelectron. J., 42 (5): 785-789 (2011)Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit: design and chip characterization., , and . ISCAS (3), page 2200-2203. IEEE, (2005)"The flipped voltage follower"-based low voltage fully differential CMOS sample-and-hold circuit., , , and . ISCAS, page 1716-1719. IEEE, (2008)