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Disambiguation of "Kvatinsky, Shahar"

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TDPP: 2-D Permutation-Based Protection of Memristive Deep Neural Networks.

, , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (3): 742-755 (March 2024)

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Yuval Shahar

 

Other publications of authors with the same name

Cytomorphic Electronics With Memristors for Modeling Fundamental Genetic Circuits., , , and . IEEE Trans. Biomed. Circuits Syst., 14 (3): 386-401 (2020)IMAGING: In-Memory AlGorithms for Image processiNG., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (12): 4258-4271 (2018)Memory Processing Unit for in-memory processing., and . NANOARCH, page 171-172. ACM, (2016)Simple magic: Synthesis and in-memory Mapping of logic execution for memristor-aided logic., , , and . ICCAD, page 225-232. IEEE, (2017)X-MAGIC: Enhancing PIM Using Input Overwriting Capabilities., , , and . VLSI-SOC, page 64-69. IEEE, (2020)Making Memristive Processing-in-Memory Reliable., , and . ICECS, page 1-6. IEEE, (2021)HashPIM: High-Throughput SHA-3 via Memristive Digital Processing-in-Memory., , , and . MOCAST, page 1-4. IEEE, (2022)Undergraduate Students' Attitudes Toward an Engineering Course that Integrates Several Levels of Abstraction., , and . ICL (2), volume 634 of Lecture Notes in Networks and Systems, page 491-497. Springer, (2022)Sensing with Memristive Complementary Resistive Switch: Modelling and Simulations., , , , , , , and . DFT, page 1-6. IEEE, (2020)Bitwise Logic Using Phase Change Memory Devices Based on the Pinatubo Architecture., , and . CoRR, (2024)