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Design of an OpenVG Hardware Rendering Engine., , , , и . IEICE Trans. Inf. Syst., 94-D (12): 2409-2417 (2011)An Accelerator for Rendering 2D Vector Graphics., , , , и . CGVR, стр. 88-. CSREA Press, (2010)Pipelined Squarer for Unsigned Integers of Up to 12 Bits., и . IEICE Trans. Inf. Syst., 101-D (3): 795-798 (2018)Efficient Hardware Multiplicative Inverters., и . ICISC, том 2587 из Lecture Notes in Computer Science, стр. 313-326. Springer, (2002)Universal Wormhole Routing., и . SPDP, стр. 56-63. IEEE Computer Society, (1993)A DSP-Enhanced 32-Bit Embedded Microprocessor., и . EUC, том 3824 из Lecture Notes in Computer Science, стр. 17-26. Springer, (2005)Loeffler DCT accelerator for small portable devices., , и . IEICE Electron. Express, 12 (13): 20150411 (2015)Design of a Loeffler DCT using Xilinx Vivado HLS (Abstract Only)., , и . FPGA, стр. 278. ACM, (2015)A Low-Power DSP-Enhanced 32-Bit EISC Processor., и . HiPEAC, том 3793 из Lecture Notes in Computer Science, стр. 302-316. Springer, (2005)