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Area Overhead and Test Time Co-Optimization through NoC Bandwidth Sharing.

, , и . ATS, стр. 459-462. IEEE, (2007)

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Esther Fujiwara

Hideo Baba

Hideo Ohashi

Hideo Andreas Baba

Hideo Ikezawa-Hanada

 

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Handling the pin overhead problem of DFTs for high-quality and at-speed tests., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (9): 1105-1113 (2002)SPIRIT: a highly robust combinational test generation algorithm., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (12): 1446-1458 (2002)Constraining Transition Propagation for Low-Power Scan Testing Using a Two-Stage Scan Architecture., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (5): 450-454 (2007)Brief Announcement: Acceleration by Contention for Shared Memory Mutual Exclusion Algorithms., , и . DISC, том 5805 из Lecture Notes in Computer Science, стр. 172-173. Springer, (2009)Optimal Wait-Free Clock Synchronisation Protocol on a Shared-Memory Multi-processor System., , , и . WDAG, том 1320 из Lecture Notes in Computer Science, стр. 290-304. Springer, (1997)A Layout Adjustment Problem for Disjoint Rectangles Preserving Orthogonal Order., , , и . GD, том 1547 из Lecture Notes in Computer Science, стр. 183-197. Springer, (1998)A Test Methodology for Interconnect Structures of LUT-based FPGAs., , , , и . Asian Test Symposium, стр. 68-74. IEEE Computer Society, (1996)New DFT Techniques of Non-Scan Sequential Circuits with Complete Fault Efficiency., , и . Asian Test Symposium, стр. 263-268. IEEE Computer Society, (1999)Localized random access scan: Towards low area and routing overhead., , , и . ASP-DAC, стр. 565-570. IEEE, (2008)Instruction-Based Delay Fault Self-Testing of Processor Cores., , , и . VLSI Design, стр. 933-. IEEE Computer Society, (2004)