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Fault-Tolerant Unicast-Based Multicast for Reliable Network-on-Chip Testing.

, , и . ACM Trans. Design Autom. Electr. Syst., 23 (6): 73:1-73:23 (2018)

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Dong Xiang

Dong Xiang

Ming Xiang

Xuemin Xiang

Wei Xiang

 

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An Optimal Design for Parallel Test Generation Based on Circuit Partitioning., и . VLSI Design, стр. 297-300. IEEE Computer Society, (1994)Pattern-directed circuit virtual partitioning for test power reduction., , и . ITC, стр. 1-10. IEEE Computer Society, (2007)Non-Scan Design for Testability Based on Fault Oriented Conflict Analysis., , и . Asian Test Symposium, стр. 86-. IEEE Computer Society, (2002)Diagnosis of Multiple Scan-Chain Faults in the Presence of System Logic Defects., , , и . Asian Test Symposium, стр. 297-302. IEEE Computer Society, (2011)A Hybrid Flow for Memory Failure Bitmap Classification., , , , , , и . Asian Test Symposium, стр. 314-319. IEEE Computer Society, (2012)TM: a new and simple topology for interconnection networks., , и . J. Supercomput., 66 (1): 514-538 (2013)Constraining Transition Propagation for Low-Power Scan Testing Using a Two-Stage Scan Architecture., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (5): 450-454 (2007)Low-Power Weighted Pseudo-Random Test Pattern Generation for Launch-on-Capture Delay Testing., , и . VTS, стр. 1-6. IEEE, (2020)Cooperative power scheduling for a network of MIMO links., , и . IEEE Trans. Wirel. Commun., 9 (3): 939-944 (2010)Compressing Test Data for Deterministic BIST Using a Reconfigurable Scan Arhcitecture., , , , и . ATS, стр. 299-306. IEEE, (2006)