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Disambiguation of "Tay, Thian Fatt"

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A signed integer programmable power-of-two scaler for 2n-1, 2n, 2n+1 RNS.

, , and . ISCAS, page 2211-2214. IEEE, (2013)

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Merani Thianprasit

Axel Thiäner

El Hadji Amadou Thiandoum

Christopher Tay

Sarab Tay

 

Other publications of authors with the same name

A signed integer programmable power-of-two scaler for 2n-1, 2n, 2n+1 RNS., , and . ISCAS, page 2211-2214. IEEE, (2013)A unified 2n-1, 2n, 2n+1 RNS scaler with dual scaling constants., , and . APCCAS, page 296-299. IEEE, (2012)A new algorithm for single residue digit error correction in Redundant Residue Number System., and . ISCAS, page 1748-1751. IEEE, (2014)Erratum to "Efficient VLSI Implementation of 2n Scaling of Signed Integer in RNS 2n-1, 2n, 2n+1"., , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (4): 1612 (2016)New Algorithm for Signed Integer Comparison in 2n+k, 2n-1, 2n+1, 2n±1-1 and Its Efficient Hardware Implementation., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (6): 1481-1493 (2017)Efficient VLSI Implementation of $2^n$ Scaling of Signed Integer in RNS $\2^n-1, 2^n, 2^n+1\$., , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (10): 1936-1940 (2013)A Non-Iterative Multiple Residue Digit Error Detection and Correction Algorithm in RRNS., and . IEEE Trans. Computers, 65 (2): 396-408 (2016)New algorithm for signed integer comparison in four-moduli superset 2n, 2n -1, 2n +1, 2n+1-1., and . APCCAS, page 519-522. IEEE, (2014)A fast and compact circuit for integer square root computation based on Mitchell logarithmic method., , , , and . ISCAS, page 1235-1238. IEEE, (2012)A new unified modular adder/subtractor for arbitrary moduli., and . ISCAS, page 53-56. IEEE, (2015)