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Time/Frequency Analysis of Impulsive Noise on Powerline Channels.

, , , , and . IHN, volume 256 of IFIP, page 143-150. Springer, (2007)

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Partial and Dynamic Reconfiguration of FPGAs: a top down design methodology for an automatic implementation., and . ISVLSI, page 436-437. IEEE Computer Society, (2006)Time/Frequency Analysis of Impulsive Noise on Powerline Channels., , , , and . IHN, volume 256 of IFIP, page 143-150. Springer, (2007)Performance evaluation of an automotive distributed architecture based on a high speed power line communication protocol using a transaction level modeling approach., , , and . J. Real Time Image Process., 9 (1): 281-295 (2014)Designing a Reconfigurable MC-CDMA for Beyond 3G Applications., and . ISWCS, page 771-775. IEEE, (2006)Evaluation of an RTOS on top of a hosted virtual machine system., , and . DASIP, page 290-297. IEEE, (2013)Implementation of SCHC in NS-3 and Comparison with 6LoWPAN., , , , , and . ICT, page 432-436. IEEE, (2019)Hypervisor mechanisms to manage FPGA reconfigurable accelerators., , and . FPT, page 44-52. IEEE, (2016)Multi-User Detection for CDMA Communications Based on Self Organized Neural Networks Structures., , and . DELTA, page 52-58. IEEE Computer Society, (2002)On the Performance Evaluation of LoRaWAN with Re-transmissions under Jamming., , , , and . ISCC, page 1-7. IEEE, (2020)Partial and dynamic reconfiguration of FPGAs: a top down design methodology for an automatic implementation., , and . IPDPS, IEEE, (2006)