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Implementation of Scalable Embedded FPGA for SOC., , , and . ReCoSoC, page 59-62. Univ. Montpellier II, (2005)Designing a 3D tree-based FPGA: Optimization of butterfly programmable interconnect topology using 3D technology., , and . 3DIC, page 1-8. IEEE, (2013)Designing 3D tree-based FPGA: Interconnect optimization and thermal analysis., , and . NEWCAS, page 1-4. IEEE, (2013)Exploration and optimization of tree-based FPGA architectures. (Exploration et optimisation d'architectures FPGA arborescentes).. Pierre and Marie Curie University, Paris, France, (2008)New CAD Tools to ConFigure Tree-Based Embedded FPGA., , , , and . HPCS, page 643-649. IEEE, (2019)Exploration of Clustering Algorithms effects on Mesh of Clusters based FPGA Architecture Performance., , , , and . HPCS, page 658-665. IEEE, (2019)Performances improvement of FPGA using novel multilevel hierarchical interconnection structure., , , and . ICCAD, page 675-679. ACM, (2006)Exploration of Heterogeneous FPGA Architectures., , , and . Int. J. Reconfigurable Comput., (2011)H.264/AVC high definition intra coding implementation on multiprocessor system on chip technology architecture., , , , , and . IET Comput. Digit. Tech., 9 (5): 259-267 (2015)Application Specific FPGA Using Heterogeneous Logic Blocks., , and . ARC, volume 5992 of Lecture Notes in Computer Science, page 92-109. Springer, (2010)