( en | de | ru )

 

Disambiguation of "Hoyos, Sebastian"

Author of the publication

copydeleteadd this publication to your clipboard
A novel continuous time ternary encoding based SS-OCT calibration.

, , , , , , and . BioCAS, page 5-8. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Guillermo Hoyos Vásquez

Karl Hoyos

Carl Hoyos

Rudolf Hoyos

Alice Hoyos

 

Other publications of authors with the same name

Analytical framework and bandwidth optimisation of orthogonal frequency division multiplexing low-order multi-channel filter-bank receivers for achieving sampling clock-jitter robustness., , , and . IET Circuits Devices Syst., 5 (5): 360-364 (2011)Ultra-wideband analog-to-digital conversion via signal expansion., and . IEEE Trans. Veh. Technol., 54 (5): 1609-1622 (2005)Monobit digital receivers for ultrawideband communications., , and . IEEE Trans. Wirel. Commun., 4 (4): 1337-1344 (2005)Mixed-signal equalization architectures for printed circuit board channels., , and . ICASSP, page 3768-3771. IEEE, (2002)Compressive Spectrum Sensing Front-ends for Cognitive Radios., and . SMC, page 1899-1994. IEEE, (2009)The Spectral Calibration of Swept-Source Optical Coherence Tomography Systems Using Unscented Kalman Filter., and . BioCAS, page 1-4. IEEE, (2018)The impact of ADC nonlinearity in a mixed-signal compressive sensing system for frequency-domain sparse signals., , , , and . Phys. Commun., 5 (2): 196-207 (2012)Multi-Channel Receiver Nonlinearity Cancellation Using Channel Speculation Passing Algorithm., , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (2): 599-603 (2022)A Sub-Nyquist Rate Sampling Receiver Exploiting Compressive Sensing., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (3): 507-520 (2011)A 38GS/s 7b Time-Interleaved Pipelined-SAR ADC with Speed-Enhanced Bootstrapped Switch in 22nm FinFET., , , , , , , , and . CICC, page 1-2. IEEE, (2022)