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P2IP: A novel low-latency Programmable Pipeline Image Processor.

, , , and . Microprocess. Microsystems, 39 (7): 529-540 (2015)

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Adaptive video-based algorithm for accident detection on highways., , , , and . SIES, page 1-6. IEEE, (2017)Dynamically and Partially Reconfigurable Embedded System Architecture for Automotive and Multimedia Applications. (Reconfiguration dynamique partielle des systèmes embarqués pour les applications de sécurité routière et les applications multimédias).. University of Valenciennes and Hainaut-Cambresis, France, (2011)FPGA-based digital tunable wireless transceiver for the TETRA-TETRAPOL bands., , and . SIES, page 1-8. IEEE, (2017)Dynamically reconfigurable architecture for a driver assistant system., , , , and . SASP, page 62-65. IEEE Computer Society, (2011)FPGA hardware in the loop system for ERTMS-ETCS train equipment testing., , , and . SIES, page 55-62. IEEE, (2016)LP-P2IP: A Low-Power Version of P1IP Architecture Using Partial Reconfiguration., , , , , and . ARC, volume 10216 of Lecture Notes in Computer Science, page 16-27. (2017)P2IP: A novel low-latency Programmable Pipeline Image Processor., , , and . Microprocess. Microsystems, 39 (7): 529-540 (2015)A new self-adapting architecture for feature detection., , , and . FPL, page 643-646. IEEE, (2012)An Improved Automotive Multiple Target Tracking System Design., , , , and . DSD, page 255-258. IEEE Computer Society, (2010)