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SQNR estimation of non-linear fixed-point algorithms.

, , , и . EUSIPCO, стр. 522-526. IEEE, (2010)

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Juan López-Pila

Juan López Gejo

Juan Antonio Cuéllar López

Juan Manuel Salgado López

Juan Miguel Rodríguez López

 

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Bit-Width Selection for Data-Path Implementations., , и . ISSS, стр. 114-121. ACM / IEEE Computer Society, (1999)Fast characterization of the noise bounds derived from coefficient and signal quantization., , , и . ISCAS (4), стр. 309-312. IEEE, (2003)Any-Radix Efficient Fully-Parallel Implementation of the Fast Fourier Transform on FPGAs., и . DCIS, стр. 1-6. IEEE, (2023)High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs., , , и . FPL, стр. 1-4. IEEE, (2006)High-speed systolic array for gene matching., , , , и . FPGA, стр. 248. ACM, (2004)Fast Fixed-Point Optimization of DSP Algorithms., , , и . VLSI-SoC (Selected Papers), том 373 из IFIP Advances in Information and Communication Technology, стр. 182-205. Springer, (2010)Optimized Architectural Synthesis of Fixed-Point Datapaths., , , , и . ReConFig, стр. 85-90. IEEE Computer Society, (2008)Optimized Synthesis of DSP Cores Combining Logic-based and Embedded FPGA Resources., , , и . SoC, стр. 1-4. IEEE, (2006)SQNR estimation of non-linear fixed-point algorithms., , , и . EUSIPCO, стр. 522-526. IEEE, (2010)Analysis of limit cycles by means of affine arithmetic computer-aided tests., , , и . EUSIPCO, стр. 991-994. IEEE, (2004)