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Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores.

, , , and . DAC, page 593-598. ACM Press, (1995)

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Predictable Embedded Multiprocessor System Design., , , , , and . SCOPES, volume 3199 of Lecture Notes in Computer Science, page 77-91. Springer, (2004)Seeking (the right) Problems for the Solutions of Reconfigurable Computing., , and . FPL, volume 1673 of Lecture Notes in Computer Science, page 520-525. Springer, (1999)Streaming scratchpad memory organization for video applications., , , , , and . Circuits, Signals, and Systems, page 427-432. IASTED/ACTA Press, (2004)Constraint Analysis for DSP Code Generation., , , , and . ISSS, page 33-40. ACM / IEEE Computer Society, (1997)Synthesis of delay functions in DSP compilers., , , and . EURO-DAC, page 68-72. IEEE Computer Society, (1990)Allocation of multiport memories for hierarchical data stream., , , and . ICCAD, page 728-735. IEEE Computer Society / ACM, (1993)PROPHID: A Heterogeneous Multi-Processor Architecture for Multimedia., , , and . ICCD, page 164-169. IEEE Computer Society, (1997)Realization of QoS management using negotiation algorithms for multiprocessor NoC., , and . ISCAS, IEEE, (2006)Real-time aware rendering of scalable arbitrary-shaped MPEG-4 decoder for multiprocessor systems., , and . Real-Time Image Processing, volume 6496 of SPIE Proceedings, page 64960D. SPIE, (2007)Application Specific Instruction-Set Processor Template for Motion Estimation in Video Applications., , , , , , , , , and 1 other author(s). IEEE Trans. Circuits Syst. Video Techn., 15 (4): 508-527 (2005)