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An efficient DVS scheme for on-chip networks using reconfigurable Virtual Channel allocators., , , и . ISLPED, стр. 249-254. IEEE, (2015)POSTER: Elastic Reconfiguration for Heterogeneous NoCs with BiNoCHS., , , , и . PACT, стр. 164-165. IEEE Computer Society, (2017)AUDIBLE: A Convolution-Based Resource Allocator for Oversubscribing Burstable Virtual Machines., , , , , и . ASPLOS (3), стр. 119-132. ACM, (2024)Effective cache bank placement for GPUs., , , , и . DATE, стр. 31-36. IEEE, (2017)Chapter Three - A power-performance balanced network-on-chip for mixed CPU-GPU systems., , , и . Adv. Comput., (2022)Express-Lane Scheduling and Multithreading to Minimize the Tail Latency of Microservices., , , и . ICAC, стр. 194-199. IEEE, (2019)Q-Zilla: A Scheduling Framework and Core Microarchitecture for Tail-Tolerant Microservices., , , и . HPCA, стр. 207-219. IEEE, (2020)An energy-efficient virtual channel power-gating mechanism for on-chip networks., , , , и . DATE, стр. 1527-1532. ACM, (2015)LTRF: Enabling High-Capacity Register Files for GPUs via Hardware/Software Cooperative Register Prefetching., , , , , , , и . ASPLOS, стр. 489-502. ACM, (2018)Software Data Planes: You Can't Always Spin to Win., , и . SoCC, стр. 337-350. ACM, (2019)