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Interconnect peak current reduction for wavelet array processor using self-timed signaling.

P. Liljeberg, I. Dhaou, J. Plosila, J. Isoaho, and H. Tenhunen. ISCAS (4), page 485-488. IEEE, (2002)

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Martin Juha

Juha Tiihonen

Attila Juhász

Ingolf Juhasz-Böss

Juha Reunanen

Other publications of authors with the same name

High-performance on-chip network platform for memory-on-processor architectures.M. Daneshtalab, M. Ebrahimi, P. Liljeberg, J. Plosila, and H. Tenhunen. ReCoSoC, page 1-6. IEEE, (2011)HIBS - Novel inter-layer bus structure for stacked architectures.M. Daneshtalab, M. Ebrahimi, and J. Plosila. 3DIC, page 1-7. IEEE, (2011)A Security Framework for Fog Networks Based on Role-Based Access Control and Trust Models.F. Hosseinpour, A. Siddiqui, J. Plosila, and H. Tenhunen. CONFENIS, volume 310 of Lecture Notes in Business Information Processing, page 168-180. Springer, (2017)Towards a Formal Power Estimation Framework for Hardware Systems.J. Tuominen, T. Säntti, and J. Plosila. SoC, page 96-99. IEEE, (2005)DyMeP: An Infrastructure to Support Dynamic Memory Binding for Runtime Mapping in CGRAs.M. Tajammul, S. Jafri, P. Ellervee, A. Hemani, H. Tenhunen, and J. Plosila. VLSID, page 547-552. IEEE Computer Society, (2015)Online testing of many-core systems in the Dark Silicon era.M. Haghbayan, A. Rahmani, P. Liljeberg, J. Plosila, and H. Tenhunen. DDECS, page 141-146. IEEE Computer Society, (2014)CARS: congestion-aware request scheduler for network interfaces in NoC-based manycore systems.M. Daneshtalab, M. Ebrahimi, J. Plosila, and H. Tenhunen. DATE, page 1048-1051. EDA Consortium San Jose, CA, USA / ACM DL, (2013)SEECC: A secure and efficient elliptic curve cryptosystem for E-health applications.G. Sahebi, A. Majd, M. Ebrahimi, J. Plosila, J. Karimpour, and H. Tenhunen. HPCS, page 492-500. IEEE, (2016)Efficient application mapping in resource limited homogeneous NoC-based manycore systems.G. Georgakarakos, M. Daneshtalab, and J. Plosila. HPCS, page 207-212. IEEE, (2013)Design space exploration of thermal-aware many-core systems.K. Vaddina, A. Rahmani, M. Fattah, P. Liljeberg, and J. Plosila. J. Syst. Archit., 59 (10-D): 1197-1213 (2013)

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Disambiguation of "Plosila, Juha"

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Interconnect peak current reduction for wavelet array processor using self-timed signaling.

Please choose a person to relate this publication to

Martin Juha

Juha Tiihonen

Attila Juhász

Ingolf Juhasz-Böss

Juha Reunanen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Plosila, Juha"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Interconnect peak current reduction for wavelet array processor using self-timed signaling.

Please choose a person to relate this publication to

Martin Juha

Juha Tiihonen

Attila Juhász

Ingolf Juhasz-Böss

Juha Reunanen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Interconnect peak current reduction for wavelet array processor using self-timed signaling.