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Radix-2 Multioperand and Multiformat Streaming Online Addition., , and . IEEE Trans. Computers, 61 (6): 790-803 (2012)Minimum Sum of Absolute Differences Implementation in a Single FPGA Device., , , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 986-990. Springer, (2004)Efficient Floating-Point Givens Rotation Unit., and . Circuits Syst. Signal Process., 40 (5): 2419-2442 (2021)Simplified floating-point units for high dynamic range image and video systems., and . ISCE, page 1-2. IEEE, (2015)Efficient floating-point representation for balanced codes for FPGA devices., , , , and . ICCD, page 272-277. IEEE Computer Society, (2013)SIMD Enhancements for a Hough Transform Implementation., , , and . DSD, page 899-903. IEEE Computer Society, (2008)Reproducible Summation Under HUB Format., , and . ARITH, page 38-45. IEEE, (2019)Efficient mapping on FPGA of convolution computation based on combined CSA-CPA accumulator., , , , , , and . ICECS, page 419-422. IEEE, (2009)A study of decimal left shifters for binary numbers., , and . Inf. Comput., (2012)Improving fixed-point implementation of QR decomposition by rounding-to-nearest., and . ISCE, page 1-2. IEEE, (2015)