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Side-channel Resistant Implementations of a Novel Lightweight Authenticated Cipher with Application to Hardware Security.

, , , , and . ACM Great Lakes Symposium on VLSI, page 229-234. ACM, (2021)

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A System-Level Design Methodology for Reconfigurable Computing Applications., , and . FPT, page 311-312. IEEE, (2005)Implementation of EAX Mode of Operation for FPGA Bitstream Encryption and Authentication., and . FPT, page 335-336. IEEE, (2005)Secure Partial Reconfiguration of FPGAs., and . FPT, page 155-162. IEEE, (2005)Very Compact FPGA Implementation of the AES Algorithm., and . CHES, volume 2779 of Lecture Notes in Computer Science, page 319-333. Springer, (2003)A Multiplatform Parallel Approach for Lattice Sieving Algorithms., and . ICA3PP (1), volume 12452 of Lecture Notes in Computer Science, page 661-680. Springer, (2020)Exploiting system-level parallelism in the application development on a reconfigurable computer., , , , , and . FPT, page 443-446. IEEE, (2003)Option space exploration using distributed computing for efficient benchmarking of FPGA cryptographic modules., , , and . FPT, page 113-118. IEEE, (2012)Reconfigurable hardware implementation of mesh routing in number field sieve factorization., , , and . FPT, page 263-270. IEEE, (2004)Comparing the cost of protecting selected lightweight block ciphers against differential power analysis in low-cost FPGAs., , , and . FPT, page 128-135. IEEE, (2017)Face-off Between the CAESAR Lightweight Finalists: ACORN vs. Ascon., , , and . FPT, page 330-333. IEEE, (2018)