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An Emulator for Exploring RaPiD Configurable Computing Architectures.

, , , , , , , , , and . FPL, volume 2147 of Lecture Notes in Computer Science, page 17-26. Springer, (2001)

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Distributed-memory parallel routing for field-programmable gatearrays., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (8): 850-862 (2000)Energy-efficient specialization of functional units in a coarse-grained reconfigurable array., , , , and . FPGA, page 107-110. ACM, (2011)Architecture Adaptive Routability-Driven Placement for FPGAs (abstract only)., , and . FPGA, page 266. ACM, (2005)RaPiD - Reconfigurable Pipelined Datapath., , and . FPL, volume 1142 of Lecture Notes in Computer Science, page 126-135. Springer, (1996)MONTAGNE: An FPL for Synchronous and Asynchronous Circuits., , , and . FPL, volume 705 of Lecture Notes in Computer Science, page 44-51. Springer, (1992)Adding dataflow-driven execution control to a Coarse-Grained Reconfigurable Array., , and . FPL, page 353-360. IEEE, (2012)Static versus scheduled interconnect in Coarse-Grained Reconfigurable Arrays., , , , , , , and . FPL, page 268-275. IEEE, (2009)The practical application of retiming to the design of high-performance systems., and . ICCAD, page 288-295. IEEE Computer Society / ACM, (1993)Mesh Routing Topologies for Multi-FPGA Systems., , and . ICCD, page 170-177. IEEE Computer Society, (1994)The chaos router chip: design and implementation of an adaptive router., , , , , , and . VLSI, volume A-42 of IFIP Transactions, page 311-320. North-Holland, (1993)