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Carry Estimation for Two's Complement Fixed-Width Multipliers., , and . SiPS, page 345-350. IEEE, (2006)Non-repetitive encoding with increased degree-1 encoding symbols for LT codes., , , and . APCCAS, page 655-658. IEEE, (2012)Multi-level memory systems using error control codes., , , , and . ISCAS (2), page 393-396. IEEE, (2004)Multi-mode message passing switch networks applied for QC-LDPC decoder., , , , and . ISCAS, page 752-755. IEEE, (2008)A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit., , , , and . ISCAS, page 713-716. IEEE, (2011)A field-programmable lab-on-a-chip with built-in self-test circuit and low-power sensor-fusion solution in 0.35μm standard CMOS process., , , , , , , , , and . A-SSCC, page 1-4. IEEE, (2015)Modified Robust Soliton Distribution (MRSD) with Improved Ripple Size for LT Codes., , , and . IEEE Communications Letters, 17 (5): 976-979 (2013)An LDPC Decoder Chip Based on Self-Routing Network for IEEE 802.16e Applications., , , , , , and . IEEE J. Solid State Circuits, 43 (3): 684-694 (2008)A Low Overhead DPA Countermeasure Circuit Based on Ring Oscillators., , and . IEEE Trans. Circuits Syst. II Express Briefs, 57-II (7): 546-550 (2010)An Efficient Decoder Architecture for Nonbinary LDPC Codes With Extended Min-Sum Algorithm., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (9): 863-867 (2016)