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Clear Stream towards Dynamically Reconfigurable Systems on Chip.

, , , and . ReCoSoC, page 98-104. Univ. Montpellier II, (2006)

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Evaluation of edge detectors performances with a discrete expression of Canny's criteria., , and . ICIP, page 169-172. IEEE Computer Society, (1995)Mesh and Fat-Tree comparison for dynamically reconfigurable applications., , , and . ReCoSoC, volume 7551 of KIT Scientific Reports, page 157-160. KIT Scientific Publishing, (2010)A Fault-Tolerant Layer for Dynamically Reconfigurable Multi-processor System-on-Chip., , and . ReConFig, page 284-289. IEEE Computer Society, (2009)Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems., , , and . DSD, page 575-581. IEEE Computer Society, (2009)Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability., , , , , and . IPDPS, page 176. IEEE Computer Society, (2003)Design flexibility using fpga dynamical reconfiguration., , and . ICIP, page 2821-2824. IEEE, (2004)Extension of Canny's Discrete Criteria to Second Derivative Filters Towards a Unified Approach.. ICIP (2), page 520-524. IEEE Computer Society, (1998)How to Use High Speed Reconfigurable FPGA for Real Time Image Processing?, , , and . CAMP, page 240-. IEEE Computer Society, (2000)Reconfigurable Hardware for Real Time Image Processing., , , and . ICIP, page 110-113. IEEE, (2000)Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability., , , , , and . SAMOS, volume 3133 of Lecture Notes in Computer Science, page 128-137. Springer, (2004)