Author of the publication

An Efficient Countermeasure against Correlation Power-Analysis Attacks with Randomized Montgomery Operations for DF-ECC Processor.

, , , and . CHES, volume 7428 of Lecture Notes in Computer Science, page 548-564. Springer, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit., , , , and . ISCAS, page 713-716. IEEE, (2011)Multi-mode message passing switch networks applied for QC-LDPC decoder., , , , and . ISCAS, page 752-755. IEEE, (2008)Multi-level memory systems using error control codes., , , , and . ISCAS (2), page 393-396. IEEE, (2004)A field-programmable lab-on-a-chip with built-in self-test circuit and low-power sensor-fusion solution in 0.35μm standard CMOS process., , , , , , , , , and . A-SSCC, page 1-4. IEEE, (2015)An area-efficient BCH codec with echelon scheduling for NAND flash applications., , and . ICC, page 4332-4336. IEEE, (2013)A Low Overhead DPA Countermeasure Circuit Based on Ring Oscillators., , and . IEEE Trans. Circuits Syst. II Express Briefs, 57-II (7): 546-550 (2010)An Efficient Decoder Architecture for Nonbinary LDPC Codes With Extended Min-Sum Algorithm., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (9): 863-867 (2016)An LDPC Decoder Chip Based on Self-Routing Network for IEEE 802.16e Applications., , , , , , and . IEEE J. Solid State Circuits, 43 (3): 684-694 (2008)Scalable Globally-Coupled Low-Density Parity Check Codes., , and . ISTC, page 1-5. IEEE, (2018)Carry Estimation for Two's Complement Fixed-Width Multipliers., , and . SiPS, page 345-350. IEEE, (2006)