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RTOS modeling in SystemC for real-time embedded SW simulation: A POSIX model., , , , и . Des. Autom. Embed. Syst., 10 (4): 209-227 (2005)Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project., , , , , , , , , и 2 other автор(ы). Microprocess. Microsystems, 38 (8): 960-975 (2014)Data flow analysis from UML/MARTE models based on binary traces., , и . DCIS, стр. 1-6. IEEE, (2020)The COMPLEX Eclipse framework for UML/MARTE specification and design space exploration of embedded systems., , , , , и . DASIP, стр. 1-2. IEEE, (2012)A model-driven methodology for the development of SystemC executable environments., , , и . FDL, стр. 177-184. IEEE, (2012)Static Write Buffer Cache Modeling to Increase Host-Compiled Simulation Accuracy., , и . DSD, стр. 47-53. IEEE Computer Society, (2017)Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow., , , , , и . DSD, стр. 117-125. IEEE, (2020)Systemic Embedded Software Generation from SystemC., , , и . DATE, стр. 10142-10149. IEEE Computer Society, (2003)A framework for design space exploration and performance analysis of networked embedded systems., , , , и . RAPIDO, стр. 2:1-2:8. ACM, (2014)Protocol Bus Modeling using inheritance with TLM2.0., , , и . FDL, стр. 80-85. ECSI, (2007)