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A performance-driven placement tool for analog integrated circuits., , and . IEEE J. Solid State Circuits, 30 (7): 773-780 (July 1995)Understanding the Impact of Time-Dependent Random Variability on Analog ICs: From Single Transistor Measurements to Circuit Simulations., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (3): 601-610 (2019)Boosting Latent Defect Coverage in Automotive Mixed-Signal ICs Using SVM Classifiers., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (10): 3426-3435 (October 2023)High-Level Power Minimization of Analog Sensor Interface Architectures., , and . Integr. Comput. Aided Eng., 5 (4): 303-314 (1998)Modelling impact of digital substrate noise on embedded regenerative comparators., , and . ESSCIRC, page 253-256. IEEE, (2003)A 46pJ/pulse analog front-end in 130nm CMOS for UWB impulse radio receivers., and . ESSCIRC, page 378-381. IEEE, (2008)Nonlinear behavioral modeling and phase noise evaluation in phase locked loops., and . CICC, page 53-56. IEEE, (1998)Exploring Information-Theoretic Criteria to Accelerate the Tuning of Neuromorphic Level-Crossing ADCs., , , , , and . NICE, page 63-70. ACM, (2023)Power-efficient VCO-based ADCs for Wireless Communication Systems., , , , and . ISOCC, page 244-245. IEEE, (2021)From Open-Loop to Closed-Loop Single-VCO-Based Sensor-to-Digital Converter Architectures: theoretical analysis and comparison., , and . IWASI, page 29-34. IEEE, (2019)