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Fast and robust differential flipflops and their extension to multi-input threshold gates., , , и . ISCAS, стр. 822-825. IEEE, (2015)Statistical waveform and current source based standard cell models for accurate timing analysis., и . DAC, стр. 227-230. ACM, (2008)Throughput optimal task allocation under thermal constraints for multi-core processors., , , и . DAC, стр. 776-781. ACM, (2009)Power Reduction of Functional Units Considering Temperature and Process Variations., , , и . VLSI Design, стр. 533-539. IEEE Computer Society, (2008)Temperature and Process Variations Aware Power Gating of Functional Units., , , , и . VLSI Design, стр. 515-520. IEEE Computer Society, (2008)Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip., , , , , , , , , и . DATE, стр. 854-859. ACM, (2015)REGIMap: register-aware application mapping on coarse-grained reconfigurable architectures (CGRAs)., , и . DAC, стр. 18:1-18:10. ACM, (2013)Branch-Aware Loop Mapping on CGRAs., , и . DAC, стр. 107:1-107:6. ACM, (2014)Statistical Timing Analysis Using Bounds., , , и . DATE, стр. 10062-10067. IEEE Computer Society, (2003)Automatic Design of Binary and Multiple-Valued Logic Gates on RTD Series., и . DSD, стр. 139-143. IEEE Computer Society, (2005)