( en | de | ru )

 

Disambiguation of "Amendola, Arturo"

Author of the publication

copydeleteadd this publication to your clipboard
A Model-Based Approach to the Design, Verification and Deployment of Railway Interlocking System.

, , , , , , , , and . ISoLA (3), volume 12478 of Lecture Notes in Computer Science, page 240-254. Springer, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Arturo Scheidegger

Arturo Smith

Arturo Orias

Arturo Zychlinsky

Arturo Infante

 

Other publications of authors with the same name

A Step Toward Safe Unattended Train Operations: A Pioneer Vital Control Module., , , , , , , , and . DATE, page 1-4. IEEE, (2023)A Model-Based Approach to the Design, Verification and Deployment of Railway Interlocking System., , , , , , , , and . ISoLA (3), volume 12478 of Lecture Notes in Computer Science, page 240-254. Springer, (2020)NORMA: a tool for the analysis of Relay-based Railway Interlocking Systems., , , , , , , , and . TACAS (1), volume 13243 of Lecture Notes in Computer Science, page 125-142. Springer, (2022)Formal Design and Validation of an Automatic Train Operation Control System., , , , , , , , , and 2 other author(s). RSSRail, volume 13294 of Lecture Notes in Computer Science, page 169-178. Springer, (2022)A New Methodology and Tool Set to Execute Software Test on Real-Time Safety-Critical Systems., , , , , and . EDCC, volume 3463 of Lecture Notes in Computer Science, page 293-304. Springer, (2005)Experimental Evaluation of Computer-Based Railway Control Systems., , , and . FTCS, page 380-384. IEEE Computer Society, (1997)Lessons Learned in Designing and Evaluating Railway Control Systems., , , , and . WORDS Fall, page 355-. IEEE Computer Society, (2003)Fault behavior observation of a microprocessor system through a VHDL simulation-based fault injection experiment., , , , , , , and . EURO-DAC, page 536-541. IEEE Computer Society Press, (1996)A Formal Specification and Validation of a Critical System in Presence of Byzantine Errors., , , , , and . TACAS, volume 1785 of Lecture Notes in Computer Science, page 535-549. Springer, (2000)Short Circuit Modelling and Simulation of 2x25 kV High Speed Railways., , , , , and . Asia International Conference on Modelling and Simulation, page 702-707. IEEE Computer Society, (2008)