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Tools and devices supporting the pseudo-exhaustive test., and . EURO-DAC, page 13-17. IEEE Computer Society, (1990)Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms., , , and . EDCC, volume 1667 of Lecture Notes in Computer Science, page 339-350. Springer, (1999)Generating pattern sequences for the pseudo-exhaustive test of MOS-circuits., and . FTCS, page 36-41. IEEE Computer Society, (1988)ETS 2015 best paper., and . ETS, page 1. IEEE, (2016)Variation-Aware Small Delay Fault Diagnosis on Compressed Test Responses., , , , and . ITC, page 1-10. IEEE, (2019)Exploiting the Error Resilience of the Preconditioned Conjugate Gradient Method for Energy and Delay Optimization., , , , and . IOLTS, page 1-7. IEEE, (2023)A Hybrid Protection Scheme for Reconfigurable Scan Networks., , and . VTS, page 1-7. IEEE, (2021)Robust Pattern Generation for Small Delay Faults Under Process Variations., , , , , , and . ITC, page 111-116. IEEE, (2023)Efficient Pattern Mapping for Deterministic Logic BIST., , , , , and . ITC, page 48-56. IEEE Computer Society, (2004)Adapting an SoC to ATE Concurrent Test Capabilities., , , and . ITC, page 1169-1175. IEEE Computer Society, (2002)