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Disambiguation of "Kim, Lee-Sup"

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Accelerating On-Device DNN Training Workloads via Runtime Convergence Monitor.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (5): 1574-1587 (May 2023)

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Sang Sup Kim

Kwang-Sup Lee

Sang-Sup Lee

Yong-Sup Kim

Lee Jun Kim

 

Other publications of authors with the same name

An 800-MHz low-power direct digital frequency synthesizer with an on-chip D/a converter., , , , and . IEEE J. Solid State Circuits, 39 (5): 761-774 (2004)A low-power SRAM using hierarchical bit line and local sense amplifiers., and . IEEE J. Solid State Circuits, 40 (6): 1366-1376 (2005)A low-power ROM using single charge-sharing capacitor and hierarchical bit line., and . IEEE Trans. Very Large Scale Integr. Syst., 14 (4): 313-322 (2006)An 11.5 Gb/s 1/4th Baud-Rate CTLE and Two-Tap DFE With Boosted High Frequency Gain in 110-nm CMOS., , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (3): 588-592 (2015)A 0.9-V 12-Gb/s Two-FIR Tap Direct DFE With Feedback-Signal Common-Mode Control., , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (3): 724-728 (2019)A Reconfigurable SIMT Processor for Mobile Ray Tracing With Contention Reduction in Shared Memory., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 60-I (4): 938-950 (2013)A LOG-Induced SSN-Tolerant Transceiver for On-Chip Interconnects in COG-Packaged Source Driver IC for TFT-LCD., , and . IEEE Trans. Circuits Syst. II Express Briefs, 60-II (1): 21-25 (2013)A 100 MHz-to-1 GHz Fast-Lock Synchronous Clock Generator With DCC for Mobile Applications., and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (8): 477-481 (2011)A DLL With Jitter Reduction Techniques and Quadrature Phase Generation for DRAM Interfaces., , , , and . IEEE J. Solid State Circuits, 44 (5): 1522-1530 (2009)A 20 Gbps 1-tap decision feedback equalizer with unfixed tap coefficient., and . ISCAS, page 321-324. IEEE, (2012)