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Automated throughput-driven synthesis of bus-based communication architectures.

, , and . ASP-DAC, page 495-498. ACM Press, (2005)

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BMSYN: Bus Matrix Communication Architecture Synthesis for MPSoC., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (8): 1454-1464 (2007)An iterative finite difference method for solving Bratu's problem., and . J. Comput. Appl. Math., (2016)Fast exploration of bus-based communication architectures at the CCATB abstraction., , and . ACM Trans. Embed. Comput. Syst., 7 (2): 22:1-22:32 (2008)Extending the transaction level modeling approach for fast communication architecture exploration., , and . DAC, page 113-118. ACM, (2004)Rapid prototyping of DSP chip-sets via functional reuse., and . ICASSP, page 1236-1239. IEEE Computer Society, (1996)Constraint-driven bus matrix synthesis for MPSoC., , and . ASP-DAC, page 30-35. IEEE, (2006)Automated throughput-driven synthesis of bus-based communication architectures., , and . ASP-DAC, page 495-498. ACM Press, (2005)Using TLM for Exploring Bus-based SoC Communication Architectures., and . ASAP, page 79-85. IEEE Computer Society, (2005)Higher degree immersed finite element spaces constructed according to the actual interface., , and . Comput. Math. Appl., 75 (6): 1868-1881 (2018)Rapid prototyping of multimedia chip sets., , and . ICASSP, page 2175-2178. IEEE Computer Society, (1999)