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Disambiguation of "Narayanan, Vijaykrishnan"

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ProtFe: Low-Cost Secure Power Side-Channel Protection for General and Custom FeFET-Based Memories.

, , , , , , , , , , , and . ACM Trans. Design Autom. Electr. Syst., 29 (1): 3:1-3:18 (January 2024)

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P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

 

Other publications of authors with the same name

GRAPHIC: Gather and Process Harmoniously in the Cache With High Parallelism and Flexibility., , , , , , , , , and 2 other author(s). IEEE Trans. Emerg. Top. Comput., 12 (1): 84-96 (January 2024)Robust Coreset Construction for Distributed Machine Learning., , , , , and . IEEE J. Sel. Areas Commun., 38 (10): 2400-2417 (2020)Editorial., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (1): 1 (2015)Influence of compiler optimizations on system power., , , and . DAC, page 304-307. ACM, (2000)Hardware and Software Techniques for Controlling DRAM Power Modes., , , , and . IEEE Trans. Computers, 50 (11): 1154-1173 (2001)Modeling steep slope devices: From circuits to architectures., , , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)A low latency router supporting adaptivity for on-chip interconnects., , , , and . DAC, page 559-564. ACM, (2005)Design and analysis of an NoC architecture from performance, reliability and energy perspective., , , , and . ANCS, page 173-182. ACM, (2005)Design space exploration of workload-specific last-level caches., , , , and . ISLPED, page 243-248. ACM, (2012)Power-efficient implementation of turbo decoder in SDR system., , , and . SoCC, page 119-122. IEEE, (2004)