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Mathematical formalisms for performance evaluation of networks-on-chip.

, , and . ACM Comput. Surv., 45 (3): 38:1-38:41 (2013)

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On Routing Algorithms for the DPillar Data Centre Networks., , and . ICA3PP (4), volume 9531 of Lecture Notes in Computer Science, page 329-343. Springer, (2015)An Optimal Single-Path Routing Algorithm in the Datacenter Network DPillar., , , and . IEEE Trans. Parallel Distributed Syst., 28 (3): 689-703 (2017)Analytical performance modelling of adaptive wormhole routing in the star interconnection network., , and . IPDPS, IEEE, (2006)Performance Analysis and Design Space Exploration of On-Chip Interconnection Networks.. Royal Institute of Technology, Stockholm, Sweden, (2013)base-search.net (ftkthstockholm:oai:DiVA.org:kth-136409).A performance and power analysis of WK-Recursive and Mesh Networks for Network-on-Chips., , , and . ICCD, page 142-147. IEEE, (2006)An Efficient Shortest-Path Routing Algorithm in the Data Centre Network DPillar., , , and . COCOA, volume 9486 of Lecture Notes in Computer Science, page 209-220. Springer, (2015)A comparative performance analysis of n-cubes and star graphs., and . IPDPS, IEEE, (2006)Caspian: A Tunable Performance Model for Multi-core Systems., , and . Euro-Par, volume 5168 of Lecture Notes in Computer Science, page 100-109. Springer, (2008)Routing Algorithms for Recursively-Defined Data Centre Networks., , , and . TrustCom/BigDataSE/ISPA (3), page 84-91. IEEE, (2015)978-1-4673-7952-6.A Markovian Performance Model for Networks-on-Chip., , , and . PDP, page 157-164. IEEE Computer Society, (2008)