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A Survey on Dynamically Reconfigurable Processors.

. IEICE Trans. Commun., 89-B (12): 3179-3187 (2006)

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A Routing Algorithm for DS-WDM Ring., , and . Applied Informatics, page 562-565. IASTED/ACTA Press, (1999)A Preprocessing System of the EULASH: An Environment for Efficient use of Multiprocessors with Local Memory., , , , , and . Parallel and Distributed Computing and Systems, page 68-71. IASTED/ACTA Press, (1995)Total System Image of the Reconfigurable Machine WASMII., , , , and . PDPTA, page 1092-1096. CSREA Press, (1997)Performance Evaluation of 3-Dimensional MIN with Cache Consistency Maintenance Mechanism., , , , , and . PDPTA, page 1148-1154. CSREA Press, (2003)A Packet Forwarding Layer for DIMMnet and its Hardware Implementation., , , , , and . PDPTA, page 461-467. CSREA Press, (2005)Destination Bundle: A Routing Table Reduction Technique for Distributed Routing on Dependable Networks-on-Chips., , and . PDPTA, page 1343-1349. CSREA Press, (2005)Evaluation of MuCCRA-D: A Dynamically Reconfigurable Processor with Directly Interconnected PEs., , and . ERSA, page 215-221. CSREA Press, (2008)Implementation and Evaluation of Multicast Mechanism on Network Interface Plugged into a Memory Slot., , , , , and . PDPTA, page 787-793. CSREA Press, (2007)Acceleration of ART Algorithm on an FPGA Board with Xilinx SDAccel., and . CANDAR Workshops, page 280-284. IEEE, (2019)Foreword.. IEICE Trans. Inf. Syst., 95-D (2): 293 (2012)