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Analyzing Statistical Timing Behavior of Coupled Interconnects Using Quadratic Delay Change Characteristics., and . ISQED, page 183-188. IEEE Computer Society, (2003)On statistical behavior of branch coverage in testing behavioral VHDL models., , and . HLDVT, page 89-94. IEEE Computer Society, (2000)Improving the Efficiency and Quality of Simulation-Based Behavioral Model Verification Using Dynamic Bayesian Criteria., and . ISQED, page 304-309. IEEE Computer Society, (2002)Stopping Criteria Comparison: Towards High Quality Behavioral Verification., , , , and . ISQED, page 31-37. IEEE Computer Society, (2001)Fast Antirandom (FAR) Test Generation., , , , and . HASE, page 262-269. IEEE Computer Society, (1998)On choosing test criteria for behavioral level hardware design verification., , , , , and . HLDVT, page 124-130. IEEE Computer Society, (2000)TAS: an accurate timing analyser for CMOS VLSI., , , and . EURO-DAC, page 261-265. EEE Computer Society, (1991)High quality behavioral verification using statistical stopping criteria., , , , and . DATE, page 411-419. IEEE Computer Society, (2001)An Accurate Coverage Forecasting Model for Behavioral Model Verification., and . DELTA, page 104-110. IEEE Computer Society, (2002)Efficient Verification of Behavioral Models Using Sequential Sampling Technique., , , and . VLSI, volume 162 of IFIP Conference Proceedings, page 398-406. Kluwer, (1999)