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Disambiguation of "Raghavan, Praveen"

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Patterning Aware Design Optimization of Selective Etching in N5 and Beyond.

, , , , , and . ICCD, page 415-418. IEEE Computer Society, (2017)

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Raghavan Vallur

Praveen Konidala

Paurush Praveen

Sarada Raghavan

Raghavan Chinnadurai

 

Other publications of authors with the same name

Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction- and Data-Level Parallelism., , , , and . PATMOS, volume 4148 of Lecture Notes in Computer Science, page 12-23. Springer, (2006)CMOS low-power transceivers for 60GHz multi Gbit/s communications., , , , , , , , , and 7 other author(s). CICC, page 1-8. IEEE, (2013)The defect-centric perspective of device and circuit reliability - From individual defects to circuits., , , , , , , , , and 5 other author(s). ESSDERC, page 218-225. IEEE, (2015)How much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node?, , , , and . ICCAD, page 87. ACM, (2016)Exploration of Soft-Output MIMO Detector Implementations on Massive Parallel Processors., , , , , and . J. Signal Process. Syst., 64 (1): 75-92 (2011)Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors., , , , and . ACM Trans. Design Autom. Electr. Syst., 12 (4): 41 (2007)Vertical M1 Routing-Aware Detailed Placement for Congestion and Wirelength Reduction in Sub-10nm Nodes., , , , , and . DAC, page 51:1-51:6. ACM, (2017)Exploiting finite precision information to guide data-flow mapping., , , , and . DAC, page 248-253. ACM, (2010)Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable Processor., , , , and . VLSI Design, page 201-207. IEEE Computer Society, (2008)An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating., , , , , and . DSD, page 693-700. IEEE Computer Society, (2011)