( en | de | ru )

 

Disambiguation of "Saha, Sangeet"

Author of the publication

copydeleteadd this publication to your clipboard
Auction Based Power Aware Real-Time Scheduler for Heterogeneous FPGA Cloud Platform.

, , , and . iSES, page 81-86. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Susanne Saha

Janapriya Saha

Sankalita Saha

Joyanta Saha

Barna Saha

 

Other publications of authors with the same name

Gamma-induced Degradation Analysis of Commercial off-the-shelf Camera Sensors., , , , , , and . IEEE SENSORS, page 1-4. IEEE, (2019)Design and Implementation of a RISC V Processor on FPGA., , , and . MSN, page 161-166. IEEE, (2021)EnSuRe: Energy & Accuracy Aware Fault-tolerant Scheduling on Real-time Heterogeneous Systems., , , , , , and . IOLTS, page 1-4. IEEE, (2021)Proxy Circuits for Fault-Tolerant Primitive Interfacing in Reconfigurable Devices Targeting Extreme Environments., , , and . ISCAS, page 1-5. IEEE, (2020)MAT-CNN-SOPC: Motionless Analysis of Traffic Using Convolutional Neural Networks on System-On-a-Programmable-Chip., , , , , and . AHS, page 291-298. IEEE, (2018)Profi-Load: An FPGA-Based Solution for Generating Network Load in Profinet Communication., , , , and . SMC, page 865-872. IEEE, (2019)Real-Time Application Processing for FPGA-Based Resilient Embedded Systems in Harsh Environments., , , , and . AHS, page 299-304. IEEE, (2018)RewardProfiler: A Reward Based Design Space Profiler on DVFS Enabled MPSoCs., , , , and . CSCloud/EdgeCom, page 210-220. IEEE, (2019)Anomaly Behaviour tracing of CHERI-RISC V using Hardware-Software Co-design., , , , , and . NEWCAS, page 1-5. IEEE, (2023)SHIRT (Self Healing Intelligent Real Time) Scheduling for Secure Embedded Task Processing., , and . VLSID, page 463-464. IEEE Computer Society, (2018)