Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Low power SRAM design for 14 nm GAA Si-nanowire technology.

G. Kaushal, H. Jeong, S. Maheshwaram, S. Manhas, S. Dasgupta, and S. Jung. Microelectron. J., 46 (12): 1239-1247 (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Chong-hy S k

Han-gil S k

i-s k Pak

n-s k Ch ng

hula S k ty yana

Other publications of authors with the same name

Influence of mobility model on extraction of stress dependent source-drain series resistance.M. Souza, S. Manhas, D. Sekhar, A. Oates, and P. Chaparala. Microelectron. Reliab., 44 (1): 25-32 (2004)A high performance vertical Si nanowire CMOS for ultra high density circuits.S. Maheshwaram, G. Kaushal, and S. Manhas. APCCAS, page 1219-1222. IEEE, (2010)Low power SRAM design for 14 nm GAA Si-nanowire technology.G. Kaushal, H. Jeong, S. Maheshwaram, S. Manhas, S. Dasgupta, and S. Jung. Microelectron. J., 46 (12): 1239-1247 (2015)Propagation Delay Analysis for Bundled Multi-Walled CNT in Global VLSI Interconnects.P. Das, M. Majumder, B. Kaushik, and S. Manhas. SocProS, volume 236 of Advances in Intelligent Systems and Computing, page 1117-1126. Springer, (2012)Characterisation of series resistance degradation through charge pumping technique.S. Manhas, D. Sekhar, A. Oates, and M. Souza. Microelectron. Reliab., 43 (4): 617-624 (2003)Comparison of crosstalk delay between single and bundled SWNT for global VLSI interconnects.M. Majumder, N. Pandya, B. Kaushik, and S. Manhas. RAIT, page 564-569. IEEE, (2012)An efficient method for ECSM characterization of CMOS inverter in nanometer range technologies.B. Kaur, S. Miryala, S. Manhas, and B. Anand. ISQED, page 665-669. IEEE, (2013)An 8 bit, 100 kS/s, switch-capacitor DAC SAR ADC for RFID applications.A. Joshi, S. Manhas, S. Sharma, and S. Dasgupta. Microelectron. J., 46 (6): 453-461 (2015)Metal Carbon Nanotube Schottky Barrier Diode with Detection of Polar Non-polar Gases.S. Agarwal, S. Manhas, S. Dasgupta, and N. Jain. VLSID, page 361-366. IEEE Computer Society, (2016)An accurate current source model for CMOS based combinational logic cell.B. Kaur, S. Vundavalli, S. Manhas, S. Dasgupta, and B. Anand. ISQED, page 561-565. IEEE, (2012)

BibSonomy

Disambiguation of "Manhas, S. K."

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Low power SRAM design for 14 nm GAA Si-nanowire technology.

Please choose a person to relate this publication to

Chong-hy S k

Han-gil S k

i-s k Pak

n-s k Ch ng

hula S k ty yana

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Manhas, S. K."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Low power SRAM design for 14 nm GAA Si-nanowire technology.

Please choose a person to relate this publication to

Chong-hy S k

Han-gil S k

i-s k Pak

n-s k Ch ng

hula S k ty yana

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Low power SRAM design for 14 nm GAA Si-nanowire technology.