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Fifer: Tackling Underutilization in the Serverless Era., , , , and . CoRR, (2020)Optimising power efficiency in trace cache fetch unit., , , and . IET Comput. Digit. Tech., 1 (4): 334-348 (2007)Multiverse: Dynamic VM Provisioning for Virtualized High Performance Computing Clusters., , , , , and . CCGRID, page 131-141. IEEE, (2020)Leveraging value locality for efficient design of a hybrid cache in multicore processors., , , and . ICCAD, page 1-8. IEEE, (2017)The Sleep Deprivation Attack in Sensor Networks: Analysis and Methods of Defense., , , , , and . IJDSN, 2 (3): 267-287 (2006)TaPEr: tackling power emergencies in the dark silicon era by exploiting resource scalability., , and . Conf. Computing Frontiers, page 16:1-16:8. ACM, (2015)Reducing Energy Consumption in Chip Multiprocessors Using Workload Variations., , , , and . Ultra Low-Power Electronics and Design, Kluwer / Springer, (2004)Compilation for Distributed Memory Architectures., and . The Compiler Design Handbook, CRC Press, (2002)Performance aware secure code partitioning., , and . DATE, page 1122-1127. EDA Consortium, San Jose, CA, USA, (2007)Memory bank aware dynamic loop scheduling., , , and . DATE, page 1671-1676. EDA Consortium, San Jose, CA, USA, (2007)