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Disambiguation of "Bao, Trong Huynh"

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Cross-layer design and analysis of a low power, high density STT-MRAM for embedded systems.

, , , , , , , , , and . ISCAS, page 1-4. IEEE, (2017)

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Trong Hung Quang

Trong-Phat-Le

Jin Bao

Wenwen Bao

Nghi Huynh

 

Other publications of authors with the same name

SRAM designs for 5nm node and beyond: Opportunities and challenges., , , , , and . ICICDT, page 1-4. IEEE, (2017)Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (5): 1669-1680 (2017)Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies., , , , , , , , , and 6 other author(s). ESSDERC, page 102-105. IEEE, (2014)ZipStream: Improving dependability in dynamic partial reconfiguration., , , , , and . IDT, page 1-6. IEEE, (2013)Process, Circuit and System Co-optimization of Wafer Level Co-Integrated FinFET with Vertical Nanosheet Selector for STT-MRAM Applications., , , , , , , , , and 2 other author(s). DAC, page 13. ACM, (2019)Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM., , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Cross-layer design and analysis of a low power, high density STT-MRAM for embedded systems., , , , , , , , , and . ISCAS, page 1-4. IEEE, (2017)