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Dual-Quality 4: 2 Compressors for Utilizing in Dynamic Accuracy Configurable Multipliers.

, , , и . IEEE Trans. Very Large Scale Integr. Syst., 25 (4): 1352-1361 (2017)

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Pedram Derakhshani

Pedram Emami

Pedram Yazdanbakhsh

Pedram Azad

Pedram Hovareshti

 

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Power Simulation and Estimation in VLSI Circuits.. The VLSI Handbook, CRC Press, (1999)Stack sizing analysis and optimization for FinFET logic cells and circuits operating in the sub/near-threshold regime., , и . ISQED, стр. 341-348. IEEE, (2014)Power-Aware Bus Encoding Techniques for I/O and Data Buses in an Embedded System., и . Journal of Circuits, Systems, and Computers, 11 (4): 351-364 (2002)Timing-driven placement based on partitioning with dynamic cut-net control., и . DAC, стр. 472-476. ACM, (2000)Constructing Lower and Upper Bounded Delay Routing Trees Using Linear Programming., , и . DAC, стр. 401-404. ACM Press, (1996)Hierarchical Sequence Compaction for Power Estimation., , и . DAC, стр. 570-575. ACM Press, (1997)Dynamic Power Management Based on Continuous-Time Markov Decision Processes., и . DAC, стр. 555-561. ACM Press, (1999)Standard cell library based layout characterization and power analysis for 10nm gate-all-around (GAA) transistors., , , , и . SoCC, стр. 253-258. IEEE, (2016)Coarse2Fine: A Two-stage Training Method for Fine-grained Visual Classification., , , и . CoRR, (2019)BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture., , и . IEEE Trans. Very Large Scale Integr. Syst., 17 (2): 302-306 (2009)