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Design-Space Exploration of Pareto-Optimal Architectures for Deep Learning with DVFS.

, , , , and . ISCAS, page 1-5. IEEE, (2018)

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Design-Space Exploration of Pareto-Optimal Architectures for Deep Learning with DVFS., , , , and . ISCAS, page 1-5. IEEE, (2018)Exploration of multilayer field-coupled nanomagnetic circuits., , , , , and . Microelectron. J., (2018)Energy-performance design exploration of a low-power microprogrammed deep-learning accelerator., , , , and . DATE, page 1151-1154. IEEE, (2018)Bitmap Index: A Processing-in-Memory Reconfigurable Implementation., , , , , , and . ApplePies, volume 627 of Lecture Notes in Electrical Engineering, page 173-179. Springer, (2019)NANOcom: A Mosaic Approach for nanoelectronic circuits design., , , and . DTIS, page 1-6. IEEE, (2017)Exploring New Computing Paradigms for Data-Intensive Applications.. Polytechnic University of Turin, Italy, (2019)Architectural exploration of perpendicular Nano Magnetic Logic based circuits., , , , , , and . Integr., (2018)Data Processing and Information Classification - An In-Memory Approach., , , , , , , , and . Sensors, 20 (6): 1681 (2020)Logic-in-Memory: A Nano Magnet Logic Implementation., , , , , , , , , and 1 other author(s). ISVLSI, page 286-291. IEEE Computer Society, (2015)Exploiting the Logic-In-Memory paradigm for speeding-up data-intensive algorithms., , , , , and . Integr., (2019)