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Disambiguation of "Petit, Salvador"

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Paired ROBs: A Cost-Effective Reorder Buffer Sharing Strategy for SMT Processors.

, , , and . Euro-Par, volume 5704 of Lecture Notes in Computer Science, page 309-320. Springer, (2009)

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Marc Petit

Mathieu Petit

Christophe Petit

Eberhard Petit

Antoine Petit

 

Other publications of authors with the same name

Addressing a workload characterization study to the design of consistency protocols., , , and . J. Supercomput., 38 (1): 49-72 (2006)A Sequentially Consistent Multiprocessor Architecture for Out-of-Order Retirement of Instructions., , , , and . IEEE Trans. Parallel Distributed Syst., 23 (8): 1361-1368 (2012)Paired ROBs: A Cost-Effective Reorder Buffer Sharing Strategy for SMT Processors., , , and . Euro-Par, volume 5704 of Lecture Notes in Computer Science, page 309-320. Springer, (2009)Hardware-Based Generation of Independent Subtraces of Instructions in Clustered Processors., , , , and . IEEE Trans. Computers, 62 (5): 944-955 (2013)A research-oriented course on Advanced Multicore Architecture: Contents and active learning methodologies., , , and . J. Parallel Distributed Comput., (2017)Power Reduction In Advanced Embedded IPC Processors., , , , and . Intell. Autom. Soft Comput., 15 (3): 495-507 (2009)FOS: a low-power cache organization for multicores., , , and . J. Supercomput., 75 (10): 6542-6573 (2019)A dynamic execution time estimation model to save energy in heterogeneous multicores running periodic tasks., , , , and . Future Gener. Comput. Syst., (2016)Thread-to-Core Allocation in ARM Processors Building Synergistic Pairs., , , , and . PACT, page 335-336. IEEE, (2023)Out-of-order retirement of instructions in sequentially consistent multiprocessors., , , , and . ICCD, page 1-8. IEEE Computer Society, (2010)