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Disambiguation of "Flich, José"

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An Efficient Fault-Tolerant Routing Methodology for Meshes and Tori.

, , , , , , , and . IEEE Comput. Archit. Lett., (2004)

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Humberto Jorge José

Nadine José Gonzalez

José Baena

José Teixeira

José Izquierdo

 

Other publications of authors with the same name

Switch Architecture.. Encyclopedia of Parallel Computing, Springer, (2011)Logic-Based Distributed Routing for NoCs., and . IEEE Comput. Archit. Lett., 7 (1): 13-16 (2008)Fault-Tolerant Vertical Link Design for Effective 3D Stacking., , , , and . IEEE Comput. Archit. Lett., 10 (2): 41-44 (2011)An Efficient Fault-Tolerant Routing Methodology for Meshes and Tori., , , , , , , and . IEEE Comput. Archit. Lett., (2004)A Routing Methodology for Achieving Fault Tolerance in Direct Networks., , , , , , , and . IEEE Trans. Computers, 55 (4): 400-415 (2006)An Efficient and Deadlock-Free Network Reconfiguration Protocol., , , , , and . IEEE Trans. Computers, 57 (6): 762-779 (2008)Area-efficient snoopy-aware NoC design for high-performance chip multiprocessor systems., , , and . Comput. Electr. Eng., (2015)An Effective and Feasible Congestion Management Technique for High-Performance MINs with Tag-Based Distributed Routing., , , , and . IEEE Trans. Parallel Distributed Syst., 24 (10): 1918-1929 (2013)Enabling dynamic and intelligent workflows for HPC, data analytics, and AI convergence., , , , , , , , , and 27 other author(s). Future Gener. Comput. Syst., (2022)Silicon-aware distributed switch architecture for on-chip networks., , , , and . J. Syst. Archit., 59 (7): 505-515 (2013)