( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Diagnostic simulation of stuck-at faults in sequential circuits using compact lists.

, , , , , и . ACM Trans. Design Autom. Electr. Syst., 6 (4): 471-489 (2001)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Bernhard Rudnick

Otto Rudnick

Ulrich Rudnick

Peter Rudnick

Hans Rudnick

 

Другие публикации лиц с тем же именем

A genetic algorithm framework for test generation., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (9): 1034-1044 (1997)A data acquisition methodology for on-chip repair of embedded memories., и . ACM Trans. Design Autom. Electr. Syst., 8 (4): 560-576 (2003)Compact Test Generation Using a Frozen Clock Testing Strategy., и . J. Inf. Sci. Eng., 16 (5): 703-717 (2000)K2: an estimator for peak sustainable power of VLSI circuits., , и . ISLPED, стр. 178-183. ACM, (1997)Automatic Bias Generation Using Pipeline Instruction State Coverage for Biased Random Instruction Generation., , и . IOLTW, стр. 65-. IEEE Computer Society, (2001)A Diagnostic Fault Simulator for Fast Diagnosis of Bridge Faults., и . VLSI Design, стр. 498-505. IEEE Computer Society, (1999)Diagnostic Fault Simulation of Sequential Circuits., , и . ITC, стр. 178-186. IEEE Computer Society, (1992)Enhancing high-level control-flow for improved testability., , и . ICCAD, стр. 322-328. IEEE Computer Society / ACM, (1996)Microprocessor Design Verification., и . The VLSI Handbook, CRC Press, (1999)Use of a field programmable gate array for education in manufacturing test and automatic test equipment., , и . IEEE Trans. Educ., 44 (3): 239-245 (2001)