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Beyond Fat-tree: Unidirectional Load--Balanced Multistage Interconnection Network.

, , , , и . IEEE Comput. Archit. Lett., 7 (2): 49-52 (2008)

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Roger Gilabert-Oriol

Francisco Gaona

Francisco Castellanos

Francisco Cardiel

Francisco Carabelli

 

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EST2uni: an open, parallel tool for automated EST analysis and database creation, with a data mining web interface and microarray expression data integration., , , , , и . BMC Bioinform., (2008)Contrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology., , , , и . NoCArc@MICRO, стр. 37-42. ACM, (2010)Assessing fat-tree topologies for regular network-on-chip design under nanoscale technology constraints., , , , , , , и . DATE, стр. 562-565. IEEE, (2009)Networks-on-Chip: an Interconnect Fabric for Multiprocessor Systems-on-Chip., , , и . Embedded Systems Design and Verification, CRC Press, (2009)Exploring High-Dimensional Topologies for NoC Design Through an Integrated Analysis and Synthesis Framework., , , , , , и . NOCS, стр. 107-116. IEEE Computer Society, (2008)Deterministic versus Adaptive Routing in Fat-Trees., , , , и . IPDPS, стр. 1-8. IEEE, (2007)On the Influence of the Selection Function on the Performance of Fat-Trees., , , и . Euro-Par, том 4128 из Lecture Notes in Computer Science, стр. 864-873. Springer, (2006)Beyond Fat-tree: Unidirectional Load--Balanced Multistage Interconnection Network., , , , и . IEEE Comput. Archit. Lett., 7 (2): 49-52 (2008)A HoL-blocking aware mechanism for selecting the upward path in fat-tree topologies., , , , и . J. Supercomput., 71 (7): 2339-2364 (2015)Enabling power efficiency through dynamic rerouting on-chip., , , , , и . ACM Trans. Embed. Comput. Syst., 12 (4): 111:1-111:23 (2013)