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Disambiguation of "Roncken, Marly"

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CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder.

, , , , and . ASYNC, page 62-72. IEEE Computer Society, (2000)

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Jochen Marly

Marly Antonia Maldaner Jacobi

 

Other publications of authors with the same name

CAD Directions for High Performance Asynchronous Circuits., , , , , , and . DAC, page 116-121. ACM Press, (1999)A Proof System for Brinch Hansen's Distributed Processes., , and . GI Jahrestagung, volume 50 of Informatik-Fachberichte, page 88-95. Springer, (1981)Naturalized Communication and Testing., , , , , and . ASYNC, page 77-84. IEEE Computer Society, (2015)Data-Loop-Free Self-Timed Circuit Verification., , , , and . ASYNC, page 51-58. IEEE Computer Society, (2018)Modular Timing Constraints for Delay-Insensitive Systems., , , , and . J. Comput. Sci. Technol., 31 (1): 77-106 (2016)Linear Test Times for Delay-Insensitive Circuits: a Compilation Strategy., and . Asynchronous Design Methodologies, volume A-28 of IFIP Transactions, page 13-27. North-Holland, (1993)Fsimac: a fault simulator for asynchronous sequential circuits., , , , and . Asian Test Symposium, page 114-119. IEEE Computer Society, (2000)CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder., , , , and . ASYNC, page 62-72. IEEE Computer Society, (2000)RAPPID: An Asynchronous Instruction Length Decoder., , , , , , , , , and . ASYNC, page 60-70. IEEE Computer Society, (1999)A Framework for Asynchronous Circuit Modeling and Verification in ACL2., , , and . Haifa Verification Conference, volume 10629 of Lecture Notes in Computer Science, page 3-18. Springer, (2017)