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Disambiguation of "Sutradhar, Purab Ranjan"

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POLAR: Performance-aware On-device Learning Capable Programmable Processing-in-Memory Architecture for Low-Power ML Applications.

, , , , and . DSD, page 889-898. IEEE, (2022)

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Anand Ranjan

Mukesh Ranjan

Rajeev Ranjan

Chitta Ranjan

Shashi Ranjan

 

Other publications of authors with the same name

Implementation and Evaluation of Deep Neural Networks in Commercially Available Processing in Memory Hardware., , , , and . SOCC, page 1-6. IEEE, (2022)Flexible Instruction Set Architecture for Programmable Look-up Table based Processing-in-Memory., , , and . ICCD, page 66-73. IEEE, (2021)POLAR: Performance-aware On-device Learning Capable Programmable Processing-in-Memory Architecture for Low-Power ML Applications., , , , and . DSD, page 889-898. IEEE, (2022)Defense Against on-Chip Trojans Enabling Traffic Analysis Attacks., , , , , , and . AsianHOST, page 1-6. IEEE, (2020)Neural network execution using nicked DNA and microfluidics., , , , and . CoRR, (2023)A Review of In-Memory Computing Architectures for Machine Learning Applications., , , , and . ACM Great Lakes Symposium on VLSI, page 89-94. ACM, (2020)3DL-PIM: A Look-Up Table Oriented Programmable Processing in Memory Architecture Based on the 3-D Stacked Memory for Data-Intensive Applications., , , , and . IEEE Trans. Emerg. Top. Comput., 12 (1): 60-72 (January 2024)Look-up-Table Based Processing-in-Memory Architecture With Programmable Precision-Scaling for Deep Learning Applications., , , , , , and . IEEE Trans. Parallel Distributed Syst., 33 (2): 263-275 (2022)A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms., , , , , , , , , and . IEEE Des. Test, 39 (3): 91-116 (2022)Heterogeneous Multi-Functional Look-Up-Table-based Processing-in-Memory Architecture for Deep Learning Acceleration., , , and . ISQED, page 1-8. IEEE, (2023)