Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate., , , , , , , , , and 24 other author(s). ISSCC, page 1-3. IEEE, (2015)Variation-Tolerant WL Driving Scheme for High-Capacity NAND Flash Memory., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (8): 1828-1839 (2019)When Crowd Meets Persona: Creating a Large-Scale Open-Domain Persona Dialogue Corpus., , , , , , , and . CoRR, (2023)A 64Gb 533Mb/s DDR interface MLC NAND Flash in sub-20nm technology., , , , , , , , , and 27 other author(s). ISSCC, page 430-432. IEEE, (2012)A 3.0 Gb/s/pin 4th generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip Package., , , , , , , , , and 20 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface., , , , , , , , , and 24 other author(s). ISSCC, page 136-137. IEEE, (2022)11.4 A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory., , , , , , , , , and 34 other author(s). ISSCC, page 202-203. IEEE, (2017)7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers., , , , , , , , , and 20 other author(s). ISSCC, page 130-131. IEEE, (2016)7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate., , , , , , , , , and 35 other author(s). ISSCC, page 138-139. IEEE, (2016)256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers., , , , , , , , , and 19 other author(s). IEEE J. Solid State Circuits, 52 (1): 210-217 (2017)