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S. Lee, J. Lee, I. Park, J. Park, S. Yun, M. Kim, J. Lee, M. Kim, K. Lee, T. Kim, B. Cho, D. Cho, S. Yun, J. Im, H. Yim, K. Kang, S. Jeon, S. Jo, Y. Ahn, S. Joe, S. Kim, D. kyun Woo, J. Park, H. Park, Y. Kim, J. Park, Y. Choi, M. Hirano, J. Ihm, B. Jeong, S. Lee, M. Kim, H. Lee, S. Seo, H. Jeon, C. ho Kim, H. Kim, J. Kim, Y. Yim, H. Kim, D. Byeon, H. Yang, K. Park, K. Kyung, and J. Choi. ISSCC, page 138-139. IEEE, (2016)

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Seung Jin Lee

Jin-Kuk Lee

Jin Oh Lee

Young Jin Lee

Jin-Sook Lee

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A 3.0 Gb/s/pin 4th generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip Package.Y. Jo, A. Kavala, T. Kim, B. Chun, J. Park, T. Lee, J. Seo, M. Yang, T. Park, H. Kwon and 20 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface.M. Kim, S. Yun, J. Park, H. Park, J. Lee, Y. Kim, D. Na, S. Choi, Y. Song, J. Lee and 24 other author(s). ISSCC, page 136-137. IEEE, (2022)11.4 A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory.C. Kim, J. Cho, W. Jeong, I. Park, H. Park, D. Kim, D. Kang, S. Lee, J. Lee, W. Kim and 34 other author(s). ISSCC, page 202-203. IEEE, (2017)7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate.S. Lee, J. Lee, I. Park, J. Park, S. Yun, M. Kim, J. Lee, M. Kim, K. Lee, T. Kim and 35 other author(s). ISSCC, page 138-139. IEEE, (2016)A 512Gb 3b/Cell 7th -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface.J. Cho, D. Kang, J. Park, S. Nam, J. Song, B. Jung, J. Lyu, H. Lee, W. Kim, H. Jeon and 34 other author(s). ISSCC, page 426-428. IEEE, (2021)A 512-Gb 3-b/Cell 64-Stacked WL 3-D-NAND Flash Memory.C. Kim, D. Kim, W. Jeong, H. Kim, I. Park, H. Park, J. Lee, J. Park, Y. Ahn, J. Lee and 20 other author(s). IEEE J. Solid State Circuits, 53 (1): 124-133 (2018)High-Voltage Analog System for a Mobile NAND Flash.Y. Kang, J. Kim, S. Hwang, J. Kwak, J. Park, D. Kim, C. Kim, J. Park, Y. Jeong, J. Baek and 7 other author(s). IEEE J. Solid State Circuits, 43 (2): 507-517 (2008)13.3 A 280-Layer 1Tb 4b/cell 3D-NAND Flash Memory with a 28.5Gb/mm2 Areal Density and a 3.2GB/s High-Speed IO Rate.W. Jung, H. Kim, D. Kim, T. Kim, N. Lee, D. Shin, M. Kim, Y. Rho, H. Lee, Y. Hyun and 44 other author(s). ISSCC, page 236-237. IEEE, (2024)

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Disambiguation of "Lee, Jin-Yub"

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7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate.

Please choose a person to relate this publication to

Seung Jin Lee

Jin-Kuk Lee

Jin Oh Lee

Young Jin Lee

Jin-Sook Lee

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Lee, Jin-Yub"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate.

Please choose a person to relate this publication to

Seung Jin Lee

Jin-Kuk Lee

Jin Oh Lee

Young Jin Lee

Jin-Sook Lee

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate.