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3D monolithic integration: Stacking technology and applications., , , and . ICICDT, page 1-3. IEEE, (2015)Multi-Gate FD-SOI Single Electron Transistor for hybrid SET-MOSFET quantum computing., , , , , , , and . ESSCIRC, page 49-52. IEEE, (2022)Pre bonding metrology solutions for 3D integration., , , , , , , , , and 2 other author(s). 3DIC, page 1-5. IEEE, (2010)Low temperature direct wafer to wafer bonding for 3D integration: Direct bonding, surface preparation, wafer-to-wafer alignment., , , , , , , , and . 3DIC, page 1-4. IEEE, (2010)Recent Developments of Cu-Cu non-thermo compression bonding for wafer-to-wafer 3D stacking., , , , , , , , , and 3 other author(s). 3DIC, page 1-6. IEEE, (2010)Novel low temperature 3D wafer stacking technology for high density device integration., , , , , , , , , and 1 other author(s). ESSDERC, page 151-154. IEEE, (2013)Smart Stacking™ and Smart Cut™ technologies for wafer level 3D integration., , , and . ICICDT, page 231-234. IEEE, (2013)